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DS25LV02: Low-Voltage 1024-Bit EPROM
PIN DESCRIPTION
PIN
1, 3
2
4
5
NAME
N.C.
V SS
V DD
DQ
FUNCTION
No Connection
Supply GND and Reference for Serial Communication. Attach V SS to battery-pack negative
terminal.
Supply Input. Bypass to V SS with 0.01 m F (typ).
Serial Interface Data I/O Pin. Bidirectional data transmit and receive at 16kbps. Input for
programming voltage pulse during EPROM programming. Internal 0.5 m A pulldown ensures
idle mode is entered when no DQ pullup is present.
Figure 1. Block Diagram
Reg.
Vdd_int
VDD
DQ
DIN
1-Wire I/F
and
HV
DOUT
Control
HV Detect
0.5 m A
EPROM Array
HV Shaper
Vpp
VSS
DETAILED DESCRIPTION
The DS25LV02 provides battery-pack identification and data storage. A 128-byte EPROM memory array and an 8
byte status field accessed by a low-voltage 1-Wire interface. Each DS25LV02 has a unique 64-bit Net Address
(ROM ID) for identification.
The EPROM is divided into four 32-byte pages. An additional 8-byte status field provides lock bit and page
redirection information to the user. EPROM writing occurs one byte at a time by supplying a 12V pulse on the DQ
line in-between each byte written. Each page can be individually locked by clearing the appropriate bit in the Status
field. Data is read sequentially from a starting address through the end of the array. CRC verification provides
integrity of all read and written data.
Functional compatibility has been maintained between the DS2502 and DS25LV02 at the Net Address/ROM
Command and Function Command levels for reading and writing the Memory data and Status data fields.
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